EndSem Syllabus:

Instruction set architecture CISC and RISC, Case study - instruction sets of some common CPUs.

Control unit design: Hardwired and micro-programmed design approaches

Memory system design: semiconductor memory technologies, memory organization. Cache; Cache memory hierarchy;

Peripheral devices and their characteristics: Input-output subsystems, I/O transfers - program controlled, interrupt driven and DMA, Secondary storage devices;

Privileged and non-privileged instructions, software interrupts and exceptions, programs and processes, role of interrupts in process state transitions.

Pipelining: Basic concepts of pipelining, throughput and speedup, pipeline hazards.